Research Interests
- Reconfigurable architectures
- High-level synthesis
- Reconfigurable computing
- GPGPUs
Publications
- James Coole, John Wernsing, Greg Stitt: A Traversal Cache Framework for FPGA Acceleration of Pointer Data Structures: A Case Study on Barnes-Hut N-body Simulation. ReConFig 2009 (accepted)
- Greg Stitt, Gaurav Chaudhari, James Coole: Traversal caches: a first step towards FPGA acceleration of pointer-based data structures. CODES+ISSS 2008: 61-66
Schedule
Resume
